Emitter coupled logic (ECL) circuits must often be interfaced with transistor transistor logic (TTL) circuits in integrated circuit (IC) designs. ECL circuits are regarded as the fastest available, but the high speed is obtained with large power dissipation. TTL circuits have been developed to a high degree to operate at high speed and low power. An array of available circuits includes a host of standard functions. Accordingly, where speed is required, an IC chip will include ECL circuits and where speed is not paramount, the logic circuits will involve TTL structures. Accordingly, circuits that convert ECL to TTL are needed. Typically, some form of comparator is employed to perform the transition. Since ECL ordinarily involves complementary or differental signals and TTL involves single ended signals, the comparator typically incorporates a differential to single ended conversion. Accordingly, many of the comparator circuits look very much like operational amplifiers (op-amps). If an op-amp has sufficient signal gain, a substantially rail-to-rail output signal will occur for any input overdrive. Thus, a relatively small ECL input signal swing will produce a TTL compatible output. One of the desired characteristics of such a converter is low operating power. Also desirable is a large signal gain and small signal delay.